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Lattice Semiconductor
Figure 2-16. Reception of a 64-byte Frame at 100 Mbs Data Rate
rx_clk_en
sys_clk_125
rx_write
rx_eof
Functional Description
tx_dbout[7:0]
1
2
3
64
Host Interface Read/Write Operation
During a write operation, haddr associated with hdatain, hcs_n and hwrite_n performs a write operation to an inter-
nal register. The end of transaction is indicated by assertion of hready_n. During a read operation, haddr associ-
ated with hcs_n and hread_n forms a write operation. The end of transaction is indicated by the assertion of
hready_n and hdataout_en_n along with the valid read data on hdataout.
Figure 2-17. Host Interface Read/Write Operation
hclk
haddr
[addr_width-1:0]
hdatain
ADDR
DATA
A
A
ADDR
B
[data_width-1:0]
hdataout
[data_width-1:0]
hcs_n
hread_n
hwrite_n
hready_n
hdataout_en_n
WRITE OPERATION
DATA B
READ OPERATION
IPUG51_03.0, December 2010
35
Tri-Speed Ethernet MAC User’s Guide
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